NVIDIA Jetson Xavier was announced back at CES 2018 and was revealed to be the biggest SOC to date. We got a handful of details about the Xavier SOC when it was announced but it seems like a ton of more information have been published on the Jetson Xavier DevKit page (via JetsonHacks).
NVIDIA Jetson Xavier Officially Supports PCIe 4.0 – Multiple Operating Models at 10W, 15W and 30W, Details Published
While NVIDIA revealed some key details of the Jetson Xavier (NVIDIA Issac) platform at Computex 2018, more details have now been published and revealed. The introductory video, published by the NVIDIA Developer YouTube channel has revealed the entire devkit details, specifications, and the underlying technology.
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NVIDIA Jetson Xavier Devkit Design, Dimensions, Connectivity, I/O and More
Starting off with the details, the first thing is the design of the devkit itself. The devkit comes in two modules, one is the Jetson Xavier carrier board which includes all the connectivity options and the other is the Jetson Xavier module itself. You get everything which includes the two modules, cables and power adapter inside the package. The module measures 100mm x 87mm and 16mm height. With the carrier board, the complete package measures 105 mm x 105 mm.
To connect it to the carrier board, NVIDIA is using a 699 pin mirror mezzanine connector which is able to support all types of high-speed I/O of the Xavier SOC, including PCIe 4.0. This is NVIDIA’s first platform to officially support PCIe Gen4 and is allowing for up to 56 Gb/s transfer rates, twice as much needed by the Jetson Xavier SOC. NVIDIA has also mentioned that the connector is not only designed to support PCIe 4.0 but also future I/O standards through mezzanine technology and allowing support for future Jetson modules.
The carrier board comes in a small form factor design for robotics development and carries a range of different connectivity options. The board also comes with its own heatsink solution, underneath which lies the connectors. The Jetson Xavier module has a thermal plate attached to it which allows users to use their own thermal solutions to cool the board.
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Following is the complete list of I/O that is available on the Jetson Xavier devkit:
NVIDIA Jetson Xavier SOC – Technical Specifications, 10W, 15W and 30W Configurable TDPs
NVIDIA mentioned that the Xavier SOC is built on a TSMC 12nm process node and houses 9 billion transistors crammed underneath a 350 mm2 die area. This is a big change from the 16nmFF based 7 billion transistor design we were last showcased. My belief is that most of these changes came when NVIDIA announced and launched Volta on the 12nm process earlier in 2017. Moving the same design enhancements to a SOC saw big changes as Volta is a key part of the Xavier chip.
In terms of specifications, the Xavier SOC packs the NVIDIA custom built Carmel AMR64 CPU which houses 8 cores in a 10-wide superscalar architecture. There are features such as functional safety, dual execution, parity ECC available on the CPU itself. Within the die is also a Volta GPU which packs 512 CUDA cores.
The Volta GPU is able to perform FP32, FP16 and INT8 calculations as per need are in a multi-precision environment. The chip delivers 1.3 TFLOPs of peak FP32 performance and 20 Tensor core TOPs. The chip delivers all of this compute at just 20W, NVIDIA states that they can even reach a theoretical output of 30 TOPs with a 30W TDP so they are obviously referring to higher clocks out of the increased power envelope.
Based on the tensor core compute output, it seems like NVIDIA has the same Tensor cores on board the SOC as their flagship Tesla V100 Volta GPU which blazes through deep learning algorithms.
The Jetson Xavier SOC and the accompanying Issac platform will be available in August of 2018, so next month. The devkit will be priced at $1299 US for the complete package.
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